#include "debug.h"
#include "../DDIC/AllDDIC.h"
#include "usbd_cdc.h"
#include "IOConfig.h"


u8 vtdr_bufferR[50];
u8 vtdr_bufferG[50];
u8 vtdr_bufferB[50];


void VTDR6100_Write_Register(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0010)&0XFFfd);
    SSD2828_W_Array(SigMode,channel,buffer,2);                               

    delay_ms(5);
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    buffer[4] = Uart_Error_None;
    buffer[5] = 0;
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写寄存器状态  ：ok  
}
void VTDR6100_Read_Register(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u16 tmp;
    buffer[1]=0x03;
    SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,buffer[2]); //return package size                                
    SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);
    buffer[0] = 0x01;
    buffer[1] = buffer[3];                        
    SSD2828_W_Array(SigMode,channel,buffer,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
    for(i=0;i<buffer[2]-1;i++)
    {
        SSD2828_W_Cmd(SigMode,channel,0xFA);		
        tmp=SPI3_Read_u16_Data(channel);
        buffer[4+i]=tmp>>8;
        buffer[5+i]=tmp;
        delay_ms(5);
        i++;
    }
		buffer[0]=0x4D;	
		buffer[1]=0x02;
    //SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		SSD2828_W_Reg(SigMode,channel,0xB7,0x034b);
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 读取的 寄存器数据  ：ok 
}

void VTDR6100_Write_Gamma(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u8 buffer1[7];
    u8 i,j,k=0,temp;
	  u8 m = 0x00;
					
		if((buffer[3]&0xFF)==0x00)
		{
			for( i = 0;i<16;i++)   //8个绑点                                                                                  
			{vtdr_bufferR[i]=buffer[i+5];}	    
			for( i = 0;i<16;i++)   //8个绑点                                                                                 
			{vtdr_bufferR[i+16]=buffer[i+21];}
			for( i = 0;i<16;i++)   //8个绑点	                                                                                  
			{vtdr_bufferR[i+32]=buffer[i+37];}
			for( i = 0;i<2;i++)   //1个绑点	                                                                                  
			{vtdr_bufferR[i+48]=buffer[i+53];}
	  }	
		else if((buffer[3]&0xFF)==0x42)
		{
			for( i = 0;i<16;i++)   //8个绑点
			{vtdr_bufferG[i]=buffer[i+5];} 		 
			for( i = 0;i<16;i++)   //8个绑点
			{vtdr_bufferG[i+16]=buffer[i+21];} 		 
			for( i = 0;i<16;i++)   //8个绑点
			{vtdr_bufferG[i+32]=buffer[i+37];}	 
			for( i = 0;i<2;i++)   //1个绑点
			{vtdr_bufferG[i+48]=buffer[i+53];}
		}
		else if((buffer[3]&0xFF)==0x81)
		{
			for( i = 0;i<16;i++)   //8个绑点
			{vtdr_bufferB[i]=buffer[i+5];} 		 
			for( i = 0;i<16;i++)   //8个绑点
			{vtdr_bufferB[i+16]=buffer[i+21];}		 
			for( i = 0;i<16;i++)   //8个绑点
			{vtdr_bufferB[i+32]=buffer[i+37];}		 
			for( i = 0;i<2;i++)   //1个绑点
			{vtdr_bufferB[i+48]=buffer[i+53];}
	  }
		SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);
		delay_ms(2);		

		buffer1[0] = 0x03;        
    buffer1[1] = 0xF0;
    buffer1[2] = 0xAA;
	  buffer1[3] = 0x13;
    SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xC4;
    buffer1[2] = 0x01;
    SSD2828_W_Array(SigMode,channel,buffer1,0);		 		                                                                              			         
		buffer1[1] = 0xBF;
		buffer1[2] = buffer[4]; //gamma_group_sel
		SSD2828_W_Array(SigMode,channel,buffer1,0);		        
		delay_ms(5);
		
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB0); //GAMMA RED GROUP1
		for(i=0; i<16; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferR[i]);	
		}				 
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB1); //GAMMA RED GROUP2
		for(i=0; i<16; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferR[i+16]);	
		}									 
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB2); //GAMMA RED GROUP3
		for(i=0; i<16; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferR[i+32]);	
		}			 
		SSD2828_W_Reg(SigMode,channel,0xBC,3); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB3); //GAMMA RED GROUP4
		for(i=0; i<2; i++)
		{     
			SSD2828_W_Data(SigMode,channel,vtdr_bufferR[i+48]);	
		}
//--------------------------------------------------------------
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB4); //GAMMA GREEN GROUP1
		for(i=0; i<16; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferG[i]);	
		}		
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 			
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB5); //GAMMA GREEN GROUP2
		for(i=0; i<16; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferG[i+16]);	
		}	
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 			
		SSD2828_W_Cmd(SigMode,channel,0xBF);
		SSD2828_W_Data(SigMode,channel,0xB6); //GAMMA GREEN GROUP3
		for(i=0; i<16; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferG[i+32]);
		}
		SSD2828_W_Reg(SigMode,channel,0xBC,3);
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB7); //GAMMA GREEN GROUP3
		for(i=0; i<2; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferG[i+48]);
		}
//----------------------------------------------------------------------		
	
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB8); //GAMMA BLUE GROUP1
		for(i=0; i<16; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferB[i]);	
		}		
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB9); //GAMMA BLUE GROUP2
		for(i=0; i<16; i++)
		{
			 SSD2828_W_Data(SigMode,channel,vtdr_bufferB[i+16]);	
		}	
		SSD2828_W_Reg(SigMode,channel,0xBC,17); 			
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xBA); //GAMMA BLUE GROUP3
		for(i=0; i<16; i++)
		{
			 SSD2828_W_Data(SigMode,channel,vtdr_bufferB[i+32]);	
		}			 
		SSD2828_W_Reg(SigMode,channel,0xBC,3); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xBB); //GAMMA BLUE GROUP4
		for(i=0; i<2; i++)
		{
			SSD2828_W_Data(SigMode,channel,vtdr_bufferB[i+48]);	
		}
		delay_ms(2); 			
    buffer1[2] = 0x02;				
    buffer1[1] = 0xC4;
    buffer1[2] = 0x00;    
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
			
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);				
		delay_ms(2); 
    buffer[0]=0x4D;	//VTDR6100
    buffer[1]=0x08;		
    buffer[4] = Uart_Error_None;
    buffer[5] = 0;
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);            //返回 写寄存器状态  ：ok   
}

void VTDR6100_Write_255G_Gamma(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u8 buffer1[7];
    u8 i,j,k=0,temp;
	  u8 m = 0x00;
					
		if((buffer[3]&0xFF)==0x00)
		{
			for( i = 0;i<2;i++)   //255绑点	                                                                                  
			{vtdr_bufferR[i+48]=buffer[i+53];}
	  }	
		else if((buffer[3]&0xFF)==0x42)
		{ 
			for( i = 0;i<2;i++)   //255绑点
			{vtdr_bufferG[i+48]=buffer[i+53];}
		}
		else if((buffer[3]&0xFF)==0x81)
		{	 
			for( i = 0;i<2;i++)   //255绑点
			{vtdr_bufferB[i+48]=buffer[i+53];}
	  }
		SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);
		delay_ms(2);		

		buffer1[0] = 0x03;        
    buffer1[1] = 0xF0;
    buffer1[2] = 0xAA;
	  buffer1[3] = 0x13;
    SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xC4;
    buffer1[2] = 0x01;
    SSD2828_W_Array(SigMode,channel,buffer1,0);		 		                                                                              			         
		buffer1[1] = 0xBF;
		buffer1[2] = buffer[4]; //gamma_group_sel
		SSD2828_W_Array(SigMode,channel,buffer1,0);		        
		delay_ms(5);
		
//------------------red/green/blue---------------------	 
		SSD2828_W_Reg(SigMode,channel,0xBC,3); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);
		 
		SSD2828_W_Data(SigMode,channel,0xB3); //GAMMA RED GROUP4
		for(i=0; i<25; i++)
		{SSD2828_W_Data(SigMode,channel,vtdr_bufferR[i+48]);}
	
		SSD2828_W_Data(SigMode,channel,0xB7); //GAMMA GREEN GROUP3
		for(i=0; i<2; i++)
		{SSD2828_W_Data(SigMode,channel,vtdr_bufferG[i+48]);}
		 
		SSD2828_W_Data(SigMode,channel,0xBB); //GAMMA BLUE GROUP4
		for(i=0; i<2; i++)
		{SSD2828_W_Data(SigMode,channel,vtdr_bufferB[i+48]);}
		delay_ms(2); 				
    buffer1[2] = 0x02;				
    buffer1[1] = 0xC4;
    buffer1[2] = 0x00;    
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);		
		delay_ms(2); 				
    buffer[0]=0x4D;	//VTDR6100
    buffer[1]=0x08;		
    buffer[4] = Uart_Error_None;
    buffer[5] = 0;
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);            //返回 写寄存器状态  ：ok   
}

void VTDR6100_Read_Gamma(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
			u8 buffer1[7];
			u16 tmp;
			u8 i,j;
	
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	    delay_ms(5);	
			buffer1[0] = 0x03;        
			buffer1[1] = 0xF0;
			buffer1[2] = 0xAA;
			buffer1[3] = 0x13;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		 
			buffer1[0] = 0x02;        
			buffer1[1] = 0xC4;
			buffer1[2] = 0x01;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		 		                                                                              			         
			buffer1[1] = 0xBF;
			buffer1[2] = buffer[4]; //gamma_group_sel
			SSD2828_W_Array(SigMode,channel,buffer1,0);		        
			buffer1[1] = 0xC4;
			buffer1[2] = 0x00;    
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
	
	
	    SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
	    SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);			 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB0;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA RED GROUP1
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);		
			for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferR[i]=tmp>>8;
				  vtdr_bufferR[i+1]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB1;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA RED GROUP2
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferR[i+16]=tmp>>8;
				  vtdr_bufferR[i+17]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
		  SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB2;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA RED GROUP3
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferR[i+32]=tmp>>8;
				  vtdr_bufferR[i+33]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB3;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA RED GROUP4
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<2;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferR[i+48]=tmp>>8;
				  vtdr_bufferR[i+49]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB4;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA GREEN GROUP1
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferG[i]=tmp>>8;
				  vtdr_bufferG[i+1]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB5;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA GREEN GROUP2
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferG[i+16]=tmp>>8;
				  vtdr_bufferG[i+17]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB6;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA GREEN GROUP3
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferG[i+32]=tmp>>8;
				  vtdr_bufferG[i+33]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB7;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA GREEN GROUP4
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<2;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferG[i+48]=tmp>>8;
				  vtdr_bufferG[i+49]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB8;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA BLUE GROUP1
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferB[i]=tmp>>8;
				  vtdr_bufferB[i+1]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xB9;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA BLUE GROUP2
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferB[i+16]=tmp>>8;
				  vtdr_bufferB[i+17]=tmp;
			    delay_ms(5);
				  i++;			
		  }
			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0010); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xBA;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA BLUE GROUP3
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<16;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferB[i+32]=tmp>>8;
				  vtdr_bufferB[i+33]=tmp;
			    delay_ms(5);
				  i++;			
		  }	
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //返回个数设置	    
	    delay_ms(2);
				 
			buffer1[0] = 0x02;        
      buffer1[1] = 0xBB;          
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                 //GAMMA BLUE GROUP3
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			   for(i=0;i<2;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
				  vtdr_bufferB[i+48]=tmp>>8;
				  vtdr_bufferB[i+49]=tmp;
			    delay_ms(5);
				  i++;			
		  }
		
		 if((buffer[3]&0xff)==0x00)       //GAMMA RED
	  {     
			for(j=0;j<50;j++)
			{
				buffer[4+j]=vtdr_bufferR[j];	  	
			}               			   
	  }
		else if((buffer[3]&0xff)==0x42)  //GAMMA GREEN
		{	
	    for(j=0;j<50;j++)
			{
				buffer[4+j]=vtdr_bufferG[j];	  		
			}              
		}
		else if((buffer[3]&0xff)==0x81)   //GAMMA BLUE
		{		
			for(j=0;j<50;j++)
			{
				buffer[4+j]=vtdr_bufferB[j];								
			}        
		} 
					
    buffer[0]=0x4D;	//VTDR6100
    buffer[1]=0x09;
		
		delay_ms(15);
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);          //返回 读取的 Gamma数据  ：ok  		

    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
}

void VTDR6100_Gamma_OTP_Start(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u8 buffer1[10];
	  u8 mtp_flag;
	  SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15); 
    buffer1[0] = 0x01;
    buffer1[1] = 0x28;                    
    SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(10); 
	  buffer1[0] = 0x03;
    buffer1[1] = 0xF0; 
	  buffer1[2] = 0xAA;
	  buffer1[3] = 0x12;
    SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(1); 
	  buffer1[0] = 0x02;
    buffer1[1] = 0xCA; 
	  buffer1[2] = 0x01;
    SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(1); 		
		buffer1[0] = 0x04;
		buffer1[1] = 0xE6;	
		if(buffer[3]==0x0D)  //otp Gamma
		{	 
			buffer1[2] = 0x00;  
			buffer1[3] = 0x00;
			buffer1[4] = 0x80; 
		}
		else if(buffer[3]==0x0E)  //otp ALL
		{
			buffer1[2] = 0x9F;  
			buffer1[3] = 0x1F;
			buffer1[4] = 0x80;  
		}
		else if(buffer[3]==0x0F)  //otp PAGE 0
		{
			buffer1[2] = 0xB1;  
			buffer1[3] = 0x00;
			buffer1[4] = 0x00;  
		}
		else if(buffer[3]==0x1B)  //otp PAGE 1
		{	 
			buffer1[2] = 0x02;  
			buffer1[3] = 0x00;
			buffer1[4] = 0x00;  
		}
		else if(buffer[3]==0x1C)  //otp PAGE 2
		{
			buffer1[2] = 0x04;  
			buffer1[3] = 0x00;
			buffer1[4] = 0x00;  
		}
		else if(buffer[3]==0x1D)  //otp PAGE 5
		{
			buffer1[2] = 0x00;  
			buffer1[3] = 0x02;
			buffer1[4] = 0x00;  
		}
		else if(buffer[3]==0x1A)  //otp PAGE 4
		{		 
			buffer1[2] = 0x00;  
			buffer1[3] = 0x01;
			buffer1[4] = 0x00;  
		}
		else if(buffer[3]==0x1E)  //otp PAGE 7
		{
			buffer1[2] = 0x00;  
			buffer1[3] = 0x08;
			buffer1[4] = 0x00;  
		}
		else if(buffer[3]==0x1F)  //otp PAGE 8
		{
		//	buffer1[2] = 0x00;  
		//	buffer1[3] = 0x08;
		//	buffer1[4] = 0x00;  
		}		
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(5); 	 
    buffer1[0] = 0x04;
    buffer1[1] = 0xE7;
    buffer1[2] = 0x88;    
	  buffer1[3] = 0x55;    
	  buffer1[4] = 0x11;    
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(3000); 	
		buffer1[0] = 0x04;
		buffer1[1] = 0xE6;
		buffer1[2] = 0x00;  
		buffer1[3] = 0x00;
		buffer1[4] = 0x00;  
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(10); 
		buffer1[0] = 0x02;
		buffer1[1] = 0xCA;
		buffer1[2] = 0x02;  //
		SSD2828_W_Array(SigMode,channel,buffer1,0);     		 
		delay_ms(10);
//		buffer[1] = 0x0E;
		buffer[2] = 0x02;
		buffer[3] = Uart_Error_None;   //返回 OTP Gamma数据  ：OK
		buffer[4] = 0;
		STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);         
}
void VTDR6100_Read_Flash_ID(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	  u8 buffer1[4]; 
	  u16 tmp;
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);	
		delay_ms(5);
	  buffer1[0] = 0x01;
    buffer1[1] = 0x28;                    
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[0] = 0x03;
    buffer1[1] = 0xF0; 
	  buffer1[2] = 0xAA; 
	  buffer1[3] = 0x10; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xEA; 
	  buffer1[2] = 0x30; 
	  buffer1[3] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	   
	  buffer1[0] = 0x02;
    buffer1[1] = 0xEE; 
	  buffer1[2] = 0xAB; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x20; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(100);  
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
    buffer1[1] = 0xEE; 
	  buffer1[2] = 0x06; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x20; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(100); 		
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
    buffer1[1] = 0xEE; 
	  buffer1[2] = 0x05; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x08; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(100); 
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(100); 
    buffer1[1] = 0xEE; 
	  buffer1[2] = 0x9F; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x44; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(100);
    buffer1[1] = 0xED; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		/***read***/
		SSD2828_W_Reg(SigMode,channel,0xB7,0x0200|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,0x0003); //return package size                                
    SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);
    buffer1[0] = 0x01;
    buffer1[1] = 0xEC;                        
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
		for(int i =0;i<1;i++)
		{
			 SSD2828_W_Cmd(SigMode,channel,0xFA);		
       tmp=SPI3_Read_u16_Data(channel);
			 buffer[3+i]=tmp>>8;
       buffer[4+i]=tmp;
       delay_ms(2);
		}
   
    buffer[0]=0x4D;	
		buffer[1]=0x20;
		buffer[2]=0x02;
		//SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);  
}

void VTDR6100_Erase_Flash(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	  SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	  u8 buffer1[4]; 
	  buffer1[0] = 0x02;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x60;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x20;
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
	  delay_ms(8000);   
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	//  buffer[4] = Uart_Error_None;
  //  STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写2810状态  ：ok
}

void VTDR6100_Flash_Statu(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	  SSD2828_W_Reg(SigMode,channel,0xB7,0x0200);
	  u8 buffer1[6]; 
	  u16 tmp;
	  buffer1[0] = 0x02;
    buffer1[1] = 0x59;
	  buffer1[2] = 0x11;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;
    buffer1[1] = 0x6F;
	  buffer1[2] = 0x03;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	  buffer1[0] = 0x03;
    buffer1[1] = 0xF0;
	  buffer1[2] = 0xAA;
	  buffer1[3] = 0x10;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	  buffer1[0] = 0x02;
    buffer1[1] = 0xB8;
	  buffer1[2] = 0x04;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x03;
    buffer1[1] = 0xEA;
	  buffer1[2] = 0x30;
	  buffer1[3] = 0x20;
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x01;
    buffer1[1] = 0x11;                    
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0xAB;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x20;
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(100);  
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x06;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x20;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);  
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x05;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x08;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);  
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);  
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x01;
    SSD2828_W_Array(SigMode,channel,buffer1,0);  
    buffer1[1] = 0x65;
	  buffer1[2] = 0x07;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[0] = 0x03;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x02;
		buffer1[3] = 0x02;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(100); 
    buffer1[0] = 0x02;
    buffer1[1] = 0xED;
	  buffer1[2] = 0x10;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);  
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100); 
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x06;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x20;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x05;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x08;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x35;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x08;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
		
	/*	
    buffer1[1] = 0x65;
	  buffer1[2] = 0x04;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	  buffer1[0] = 0x04;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x00;
	  buffer1[3] = 0x00;
	  buffer1[4] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	  buffer1[0] = 0x03;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x0B;
	  buffer1[3] = 0x08;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	  buffer1[0] = 0x02;
    buffer1[1] = 0xED;
	  buffer1[2] = 0x04;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(50);
	*/	
		SSD2828_W_Reg(SigMode,channel,0xB7,0x0200|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,0x0003); //return package size                                
    //SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);
    buffer1[0] = 0x01;
    buffer1[1] = 0xEF;                        
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
		
    for(int i =0;i<2;i++)
		{
			SSD2828_W_Cmd(SigMode,channel,0xFA);		
			tmp=SPI3_Read_u16_Data(channel);
			buffer[4+i]=tmp>>8;
			buffer[5+i]=tmp;
			delay_ms(5);
		}
 
		//  buffer[0]=0x4D;	
		//	buffer[1]=0x22;
		//	buffer[4] = Uart_Error_None;
		//  SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		//	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		//  STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3); 
}

void VTDR6100_Check_Flash(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	  u8 buffer1[5]; 
	  u16 tmp;
	  buffer1[0] = 0x02;
    buffer1[1] = 0x65;
	  buffer1[2] = 0x04;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x04;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x00;
	  buffer1[3] = 0x00;
	  buffer1[4] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x03;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x0B;
	  buffer1[3] = 0x08;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x02;
    buffer1[1] = 0xED;
	  buffer1[2] = 0x04;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
		
		buffer1[0] = 0x02;
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(50);
		
		/***********************************************
		buffer1[0] = 0x02;
    buffer1[1] = 0x65;
	  buffer1[2] = 0x08;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x04;
    buffer1[1] = 0xEA;
	  buffer1[2] = 0x1F;
	  buffer1[3] = 0xCC;
	  buffer1[4] = 0x3A;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x03;
    buffer1[1] = 0xFF;
	  buffer1[2] = 0x5A;
	  buffer1[3] = 0x80;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x02;
    buffer1[1] = 0xFA;
	  buffer1[2] = 0x01;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		*****************************************************/
		
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,0x0009); //return package size                                
    SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);
    buffer1[0] = 0x01;
    buffer1[1] = 0xEC;                        
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
		 for(i=0;i<8;i++)
    {
        SSD2828_W_Cmd(SigMode,channel,0xFA);		
        tmp=SPI3_Read_u16_Data(channel);
        buffer[4+i]=tmp>>8;
        buffer[5+i]=tmp;
        delay_ms(2);
        i++;
    }
 
	//   buffer[0]=0x4D;	
	//	buffer[1]=0x23;
	//	buffer[2]=0x08;
	//	buffer[4] = Uart_Error_None;
	//    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	//   SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	//   STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3); 	  
}

void VTDR6100_Step_Five(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	  SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	  u8 buffer1[5]; 
	  buffer1[0] = 0x02;
    buffer1[1] = 0x65;
	  buffer1[2] = 0x08;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x04;
    buffer1[1] = 0xEA;
	  buffer1[2] = 0x1F;
	  buffer1[3] = 0xCC;
	  buffer1[4] = 0x20;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x03;
    buffer1[1] = 0xFF;
	  buffer1[2] = 0x5A;
	  buffer1[3] = 0x80;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x02;
    buffer1[1] = 0xFA;
	  buffer1[2] = 0x01;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);  //回到高速
		delay_ms(5);
//		buffer[4] = Uart_Error_None;
//    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写2810状态  ：ok
}

void VTDR6100_OTP_Flash(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	  u8 buffer1[6]; 	
	  SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(5);	
	
	  buffer1[0] = 0x05;
    buffer1[1] = 0xEE;
	  buffer1[2] = 0x32;
	  buffer1[3] = 0x00;
	  buffer1[4] = 0x01;
	  buffer1[5] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	  delay_ms(100);	 
	  buffer1[0] = 0x02;
    buffer1[1] = 0xED;
	  buffer1[2] = 0x02;
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
	  delay_ms(9000);
		//delay_ms(60000);	
	  buffer1[0] = 0x02;
    buffer1[1] = 0xED;
	  buffer1[2] = 0x00;
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
	  buffer1[0] = 0x03;
    buffer1[1] = 0xFF;
	  buffer1[2] = 0x5A;
		buffer1[3] = 0x80;
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	  buffer1[0] = 0x02;
    buffer1[1] = 0x01;
	  buffer1[2] = 0x00;
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(100);
		
		////add  reset
		//Set_2828_reset(OLED.SigMode);       //复位2828和OLED
		SSD_RESET_LOW;		//复位SSD2828芯片
		delay_ms(100);
		SSD_RESET_HIGH;		
		delay_ms(50); 			
		
//		buffer[0]=0x4D;	
//		buffer[1]=0x25;
//		buffer[2]=0x02;

//		buffer[4] = Uart_Error_None;
//    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写2810状态  ：ok
}

void VTDR6100_CRC_check(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[5]; 
	  u16 tmp;
		delay_ms(5000);	
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	  delay_ms(5);

	  buffer1[0] = 0x03;
    buffer1[1] = 0xFF;
	  buffer1[2] = 0x5A;
	  buffer1[3] = 0x80;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,0x0009); //return package size                                
    SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);
    buffer1[0] = 0x01;
    buffer1[1] = 0xfa;                        
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
		 for(i=0;i<9;i++)
    {
        SSD2828_W_Cmd(SigMode,channel,0xFA);		
        tmp=SPI3_Read_u16_Data(channel);
        buffer[3+i]=tmp>>8;
        buffer[4+i]=tmp;
        delay_ms(2);
        i++;
    }
//    buffer[0]=0x4D;	
//		buffer[1]=0x26;
//		buffer[2]=0x09;
//		//buffer[4] = Uart_Error_None;
//    SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
//    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3); 	  
}

void VTDR6100_Demura_on(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[5]; 
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	  delay_ms(5);	
	  buffer1[0] = 0x02;
    buffer1[1] = 0x59;
	  buffer1[2] = 0x09;
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		delay_ms(5);
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3); 	  	
}

void VTDR6100_Demura_off(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[5]; 
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	  delay_ms(5);	
	  buffer1[0] = 0x02;
    buffer1[1] = 0x59;
	  buffer1[2] = 0x00;
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		delay_ms(5);
    STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3); 	  	
}

void ProcessForIc4D( USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8 buffer[],u16 LP_B7_Data,u16 HS_B7_Data)
{	
	switch(buffer[1])
	{
		case 0x01:                                      //写寄存器
			VTDR6100_Write_Register(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;	
		case 0x02:                                      //读寄存器
			VTDR6100_Read_Register(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;		
		case 0x03:                                      //读寄存器
			VTDR6100_Write_255G_Gamma(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;				
		case 0x08:                                      //写Gamma数据    
			VTDR6100_Write_Gamma(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
		case 0x09:                                      //读Gamma数据
			VTDR6100_Read_Gamma(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break; 
		case 0x0D://OTP Gamma
			VTDR6100_Gamma_OTP_Start(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);  break;
		case 0x20:                                      //读Flash ID  
			VTDR6100_Read_Flash_ID(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
		case 0x21:                                      //擦除Demura数据    
			VTDR6100_Erase_Flash(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
		case 0x22:                                   
			VTDR6100_Flash_Statu(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
		case 0x23:
			VTDR6100_Check_Flash(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
		case 0x24:                                     
			VTDR6100_Step_Five(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
		case 0x25:
			VTDR6100_OTP_Flash(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
		case 0x26:
			VTDR6100_CRC_check(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;		
		case 0x27:
			VTDR6100_Demura_on(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;		
		case 0x28:
			VTDR6100_Demura_off(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;		
    default:	break;	
	}	
}


